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Hardware Configuration of ThumbPodWe are developing a next generation security system named ThumbPod, whose hardware is compised of Xilinx FPGA (Virtex-II), DDR SDRAM(Micron 256Mbit), and Fingerprint Sensing Device(Authentec AF-S2). The main CPU embedded in the FPGA is LEON SPARC-compliant 32bit processor.In order to accelerate the encryption routines of the Thumbpod, an AES coprocessor that performs the AES algorithm in ECB, CBC-MAC, and Counter modes of operation, is designed. This coprocessor is attached to the LEON core through the CPI interface. There are new instructions that are executed in LEON processor and will produce the encryption result of the AES algorithm in the above modes of operation using the attached AES coprocessor. |
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 1: Xilinx Virtex-II (XC2V1000) 2: Micron 256Mb DDR SDRAM (4Mb × 16× 4banks) 3: RS-232 interface 4: JTAG interface 5: XC18V04 ISP PROM 6: 7-segment LED display 7: User DIP switches 8: Clock source (100MHz / 24MHz / User clock) 9: User push buttons 10: Voltage regulators (3.3V / 2.5V / 1.8V / 1.5V) |
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| Block Diagram of LEON Processor | FPGA BOARD by Insight Electronics | |||
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Los Angeles - UCLA |
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